A super computer has been built in the Turtle Academy of Sciences. The computer consists of n · m · k CPUs. The architecture was the paralellepiped of size n × m × k , split into 1 × 1 × 1 cells, each cell contains exactly one CPU. Thus, each CPU can be simultaneously identified as a group of three numbers from the layer number from 1 to n , the line number from 1 to m and the column number from 1 to k . In the process of the Super Computer's work the CPUs can send each other messages by the famous turtle scheme: CPU ( x , y , z ) can send messages to CPUs ( x + 1, y , z ) , ( x , y + 1, z ) and ( x , y , z + 1) (of course, if they exist), there is no feedback, that is, CPUs ( x + 1, y , z ) , ( x , y + 1, z ) and ( x , y , z + 1) cannot send messages to CPU ( x , y , z ) . Over time some CPUs broke down and stopped working. Such CPUs cannot send messages, receive messages or serve as intermediates in transmitting messages. We will say that CPU ( a , b , c ) controls CPU ( d , e , f ) , if there is a chain of CPUs ( x i , y i , z i ) , such that ( x 1 = a , y 1 = b , z 1 = c ) , ( x p = d , y p = e , z p = f ) (here and below p is the length of the chain) and the CPU in the chain with number i ( i < p ) can send messages to CPU i + 1 . Turtles are quite concerned about the denial-proofness of the system of communication between the remaining CPUs. For that they want to know the number of critical CPUs. A CPU ( x , y , z ) is critical , if turning it off will disrupt some control, that is, if there are two distinctive from ( x , y , z ) CPUs: ( a , b , c ) and ( d , e , f ) , such that ( a , b , c ) controls ( d , e , f ) before ( x , y , z ) is turned off and stopped controlling it after the turning off. The first line contains three integers n , m and k ( 1 ≤ n , m , k ≤ 100 ) — the dimensions of the Super Computer. Then n blocks follow, describing the current state of the processes. The blocks correspond to the layers of the Super Computer in the order f